This paper describes Fujitsu’s CS200/CS200A series 65nm CMOS technology with a focus on the technology’s improved performance and low power consumption. These advantages result from the technology’s ability to achieve more than twice the density of transistor packing compared to 90nm technology as well as Fujitsu’s advanced copper and ultra-low-k material (ULK) technology. The ULK material serves as an inter-level dielectric that reduces parasitic interconnect capacitance compared to previous technologies and thus significantly improves speed and power characteristics. The paper also describes Fujitsu’s wide range of packaging choices and rich IP portfolio for use with the CS200/CS200A technology.