The complexity of today’s designs, together with the wealth of field programmable gate array (FPGA) and computer-aided design (CAD) tool features available, make benchmarking a difficult and expensive task. To obtain meaningful benchmarking results, a detailed understanding of the designs used in comparisons, as well as an intimate knowledge of FPGA device features and CAD tools is required. This paper presents Altera’s rigorous methodology for accurately benchmarking the capabilities of an FPGA architecture. It guides the reader through performance of a fair, accurate, and meaningful benchmarking analysis, and conversely, shows how a poor methodology can skew results and lead to false conclusions.