For today’s advanced semiconductor designs, power is the critical challenge and, in the absence of new process technologies, low-power design is the
answer. First developed by analog designers and leading-edge developers of wireless chips, low-power design techniques are now entering mainstream design, where time-to-market separates the winners from the losers. Functional verification using standard techniques is untenable—this article explains why the future of verification lies in current source modeling.

Reprinted in its entirety from ARM IQ Vol. 6, No. 4, 2007