An often-overlooked benefit of using field programmable gate arrays (FPGAs) is the ability to integrate a clocking solution. Not only does this
integration allow the reduction of the system cost, but because the latest 65-nm Altera Cyclone III FPGA contains advanced clock management and phase-locked loop (PLL) technology, it also allows for an amazing amount of flexibility in the design.


The Cyclone III clock management system allows designers to manage the clocking system for the entire FPGA as well as on the board. Furthermore, because the Cyclone III PLLs are integrated in the FPGA, they take advantage of Altera’s Quartus II design environment, which allows easy set up and configuration. This paper discusses the Cyclone III PLL Clock Synthesizer architecture and the advantages of using Cyclone III PLLs, and provides an LCD display design example.