This application note outlines a design flow for Field Programmable Gate Array (FPGA) prototyping, using the Agilent SystemVue software, as well as third-party applications that integrate well with SystemVue. The SystemVue FPGA flow can be used to quickly validate communications digital signal processing (DSP) algorithms and accelerate physical layer (PHY) performance measurements, such as bit-error-rate (BER). Although specific applications and hardware platforms are named in this case study, the flow generally applies to a variety of platforms and vendors.