Extremely high pin-count devices, like ECUs, MCUs, and FPGAs, have changed the way engineers plan and implement each device’s external interfaces, or I/Os. To meet overall component criteria, design trade-offs must be made between the chip and its package. Different form factors for similar end products also mandate that different board-level platforms be considered.

This paper defines the key capabilities needed to build a formal, cross-substrate integration flow that enables full collaboration between the IC(s), package, and PCB, and that includes multiple, target, board-level platforms for when devices/components are intended for use on different PCB form factors.