Designers are looking for new methods of reducing verification time for simulation models and hardware prototypes. Design simulation and hardware verification suffer from many of the same problems related to test vector creation, test coverage, analysis of results, and detection of elusive errors caused by temperature and voltage variations. There are many electronic design automation (EDA) tools and hardware test systems available to help solve these problems; however, there has thus far been no way to transfer work from one environment to the other.
This paper proposes a solution called “virtual prototyping,” which combines traditional test methods with an EDA tool that can translate data back and forth between a hardware prototyping environment and a design simulation environment. This technique effectively unites the worlds of simulation and hardware verification and can help designers leverage and combine the strengths of each.
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