To successfully develop an AMBA 3 AXI protocol-based design in the shortest amount of time requires more than just raw design expertise and individual, piecemeal IP components. It requires a comprehensive set of synthesizable IP, verification IP and an automated method to assemble the entire system-on-chip (SoC) subsystem.

The AMBA 3 Advanced eXtensible Interface (AXI) protocol builds on the many benefits of the AMBA 2.0 standard by greatly extending the performance and flexibility of the on-chip bus standard. But with this flexibility comes complexity. The DesignWare IP solution for the AMBA 3 AXI protocol enables designers to quickly and easily integrate the high-speed protocol into their SoC designs, while reducing risk and speeding time to results. The DesignWare IP solution for the AMBA 3 AXI protocol provides access to three main required components including synthesizable IP, verification IP and automated subsystem assembly using the Synopsys coreAssembler tool. The combination of these three offerings enable designers to substantially reduce the time spent in the design and validation of next generation high speed designs based on the AMBA 3 AXI protocol.

Reprinted in its entirety from ARM IQ Vol. 5, No. 2, 2006