An automatic method for creating Layout Versus Schematic (LVS) test structures is needed for mixed signal processes. Some of these mixed signal processes have over eighty different devices. A simple test structure is defined using each device. This test structure is then placed in a master layout that contains all devices. It will be shown in this paper how to create these test structures somewhat automatically. At the same time the master layout is generated, the netlist that will be used to do the physical verification is also created. And finally, a method for running lvs of each test vehicle and master layout is performed. Methods like that described above are needed to improve both the quality and speed that lvs code can be written.

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