Traditional architectures for wireless baseband applications are no longer adequate for next-generation modem standards. Supporting multiple, evolving standards in a single modem is only possible by using SDR techniques, which place increasing demands on performance and power consumption on the SoC. ASIP architectures enable full customization of a processor, which allows design teams to better optimize their design’s wireless baseband SoCs. This white paper describes how tool-based ASIP design methodologies automate the generation of the software tool chain, including an optimized software compiler, and the generation of RTL for ASIC and FPGA implementation, which enables rapid architecture exploration and trade-off analysis between performance, power and area.