Until recently, most processor intellectual property (IP) had been developed for ASIC implementation. Therefore, when implemented in the course-grained architecture of FPGAs, the processors are often large and slow. Alternatively, proprietary soft IP processor solutions are also available for FPGA implementation, but these offer limited tools, support and designer experience. Missing in the market was an FPGA-optimized, industry-standard 32-bit processor architecture; this paper describes just such a solution: the Cortex-M1.

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