Today’s sub-wavelength IC design needs the reticle enhancement technology (RET) such as optical proximity correction (OPC) to correct optical distortion due to photolithography effect. However the difference between the drawn layout and the actual print image persists. To accurately predict the interconnect parasitics such as resistances and capacitances, the impact of optical distortion needs to be considered. This paper presents the computation of parasitic capacitances of an IC cell in accounting for optical distortion by using a three dimensional field solver. The results offer a better understanding of the impact of optical image on the accuracy of parasitic capacitances and provide an overview for further optical effect modeling and post OPC extraction.

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