Comparing IP Integration Approaches for FPGA Implementation
Since the early days of computers and telephony, interconnection networks have been a critical part of electrical engineering. This has become even more critical in the era of very large-scale integration (VLSI) circuitry because of the drive characteristics of MOS transistors combined with the relatively high capacitance of on-chip interconnects.
The interconnection networks used to connect functional units within a chip can have a significant—indeed, a dominating—effect on the chip’s performance. Buses, although the simplest form of interconnect, are a poor choice from a density or power standpoint because the power and space required to drive them at maximum speed grow exponentially with the capacitance of the bus. Furthermore, multi-point connection networks are a poor choice because the entire length of the bus must be driven even when only a single conversation may be going on at a time, or where the communication is between direct neighbors. A crossbar is an optimal solution, up to a maximum size determined by the underlying device and wiring technology. This paper explains why, in general, the optimal solution to multi-party communication is a network built out of crossbars.
Please disable any pop-up blockers for proper viewing of this Whitepaper.