This paper introduces the first comprehensive and accurate compact resistance-inductance-capacitance-conductance (RLCG) model for through-silicon vias (TSVs) in 3-D ICs valid from low- to high-frequency regimes, with consideration of the MOS effect in silicon, the alternating-current (AC) conduction in silicon, the skin effect in TSV metal, and the eddy currents in the silicon substrate.
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