Combating Design Complexity with Electronic System Level (ESL) Methodology
There are numerous factors affecting the increase in SoC design complexity. Emerging standards, converging feature sets and rapidly rising gate counts are some of the most commonly cited. Further intensifying the design challenges are shorter and shorter time-to-market pressures, leaving little room for error. This design challenge requires the adoption of a methodology that can address the following points: IP integration and re-use, software development and system visibility. Electronic System Level (ESL) design provides solutions for all of these issues.
Through a recent acquisition, ARM has now expanded their RealView tools product line to include ESL tools. This article reviews these tools and dives head first into the design challenges that have arisen out of the need for complex SoC product design.
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