Existing testbench techniques offer a number of benefits, but they have their drawbacks as well. Once a testbench is initiated, it runs open-loop, generating results and reporting them to an engineer. The process inconveniently requires human intervention and its iterations can span weeks, or even months.

This paper introduces a new, closed-loop testbench automation system that “learns” from both the device under test (DUT) and the testbench modules during simulations. By combining concepts previously associated with compiler test automation and logic design synthesis, along with some recently-patented technology, Mentor Graphics augments directed testing and constrained random testing with algorithmic testing to create a learning-based system that actively targets desired results, rather than merely reporting them.

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