The choices have never been so abundant. Application-specific standard products (ASSPs), field programmable gate arrays (FPGAs), standard cell-based ASICs, and structured ASICs all offer effective strategies for developing smaller, faster, cheaper products. But each of these silicon integration platforms offers unique tradeoffs in terms of cost, performance, density and time-to-market. The key task for chip designers is to select the platform that best meets their application needs. This paper will attempt to outline where those tradeoffs lie with ASSPs, FPGAs, standard cell-based ASICs and structured ASICs and in the process provide a foundation for selecting the most effective silicon platform for implementing a custom design.