The Achronix Speedster FPGA family, based on the patented picoPIPE acceleration technology providing both full reprogrammability and 1.5 GHz peak performance, is an ideal vehicle for high-speed networking applications. To allow customers to easily evaluate this performance, the Speedster 100 Gbps Processing Platform (Bridge100) provides an array of nine SPD60s (providing 329k LUTs, and 23.1 Mb embedded RAM total), tied to a high-speed onboard network, 8 GB of additional on-board memory, and two 120 Gbps communication ports. This fully reprogrammable 100 Gbps platform gives the user access to the full performance, memory, bandwidth, capacity, and flexibility that the Speedster architecture offers.