Block-based design—a method of partitioning a complex FPGA design into natural sub-blocks—has become a necessity for many project teams. It not only streamlines the design and integration process but also cuts down on implementation time when used with the right tool flows. The Mentor Graphics FPGA synthesis solution, Precision RTL Plus, offers both a manual bottom-up methodology and a partition-based incremental flow for block-based design and implementation. It allows FPGA designers to cut down on run time while preserving quality-of-results (QoR) of unchanged design blocks.

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