Virtual manufacturing, enabled by rapid, full-chip simulation, is a critical component of the mask tapeout flow in the low-k1 lithography era. Virtual manufacturing enables first-time-right silicon manufacturing by detecting printing failures before a costly and time-consuming mask tapeout and wafer print has occurred. This is especially true in the latest tapeout flows which include Optical Proximity Correction (OPC) and various Resolution Enhancement Technologies (RET). This paper presents one vision for OPC mask shape defect handling which can be completely integrated within the user’s existing flow, and most importantly, requires no human intervention to disposition, waive, and/or repair detected mask shape defects.

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