Ensuring your integrated circuit (IC) design has the ability to withstand electrostatic discharge (ESD) events without incurring damage or failure is an extremely important activity. While automated flows for ESD verification are well-established for regular 2D ICs, 2.5D and 3D integration presents new challenges in both ESD design and verification. Until now, there has been a distinct lack of automated ESD verification solutions to help designers achieve effective ESD protection in 2.5D and 3D ICs.

This paper examines verification challenges for automating ESD verification in 2.5D and 3D ICs, then walks through a proven automated ESD verification methodology for 2.5/3D ICs that you will find in some advanced EDA reliability tools.