Applying Assertion-Based Formal Verification to Verification Hot Spots
The complexity of modern SoC designs has created a verification crisis. Engineers cannot imagine all of the possible corner-case behaviors let alone write tests to exercise them. The only way to address the increased complexity is to supplement traditional functional verification methods by combining assertions, simulation, and formal techniques in a process called assertion-based verification (ABV).
Please disable any pop-up blockers for proper viewing of this Whitepaper.