Altera at 40 nm: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers
The 65-nm process technology is found in leading-edge products, such as microprocessors and field programmable gate arrays (FPGAs). The next generation of these products will use the 45-nm or 40-nm process. The smaller feature size implies a smaller channel length for a transistor and shorter interconnects for a logic gate, resulting in faster switch time and shorter interconnect transport delay. The results of this process node shrinkage are favorable for logical operation, high density, and high-speed data transmission, as they are optimized for power consumption efficiency.
Altera’s Stratix IV GX FPGAs deliver the highest density, the highest performance, and the lowest power. Leveraging 40-nm benefits, a proven transceiver, and memory interface technology, Stratix IV GX FPGAs provide an unprecedented level of system bandwidth with superior signal integrity. When coupled with HardCopy IV ASICs, they provide the benefits of FPGAs and ASICs using seamless prototyping. This paper provides technical details of the Stratix IV GX FPGAs’ performance, capabilities, and targeted applications.
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