This paper presents how STMicroelectronics used one part of the system-to-RTL flow, known as ‘RTL Platforms’, based on hardware/software co-verification, to reduce the development time of a complex multi-processor design. The device is a network termination or home gateway interfacing residential LANs to an ADSL access network.

Note: By clicking on the above link, this paper will be emailed to your TechOnLine log-in address by Mentor Graphics.