A Streamlined Approach for Debugging LVS Errors
More and more, designers at the end of the pipeline are in need of a solution that helps minimize manual intervention and cross-functional interaction, and ultimately speeds design verification. Fortunately, advances in design automation technology can eliminate the tedium often associated with LVS debug. Design automation tools that work from standard designer input such as GDSII layout and SPICE netlists, and intelligently pinpoint errors, make the process of diagnosis and repair much easier and foolproof. User-friendly reporting tools and interfaces, including intuitive visual aides linked directly to layout and schematic editors, help facilitate the debugging process. This allows for the correction of errors in a matter of minutes instead of days.
Please disable any pop-up blockers for proper viewing of this Whitepaper.