This work is trying to demonstrate a new approach to check the printability of the SRAF on full-chip level. First, we try to capture the lithography process information through real empirical wafer data. Then we try to determine the margin of the conditions for which SRAFs can be printed out on the wafer. Based on all the information, we can then apply full chip optical rule check (ORC) to check the printability of SRAF. By this approach, the printout risk of the SRAF can be reduced effectively with acceptable time consuming.

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