New problems require new solutions; this
has never been truer in the realm of FPGA
design than it is today. Devices with higher
and higher pin counts have placed a significant
strain on classic, over-the-wall
methodologies. These techniques, which
worked for many years, typically
addressed FPGA and PCB design efforts
as two distinct disciplines, where the
FPGA designer defined the I/O assignments
of the FPGA and passed those
assignments to the PCB designer.