This paper describes the entire design process used to create a DSP-FPGA-based system, from the early stages to the final implementation. The proposed multiprocessing cell can handle any kind of digital signal, as well as images. Because it is a low-cost piece of hardware that is easily repeatable in a 2-D architecture organization, the developed cell is intended to be used in pipeline procedures. The paper presents some basic examples of field programmable gate array (FPGA) programming using the VHDL language, as well as examples of digital signal processor (DSP) programming using C language.