At geometries of 130 nm and below, there’s no separating power-integrity signoff from timing and signal-integrity signoff. Success requires that all three be considered concurrently. The unhappy alternative is to iterate endlessly and risk overdesign of the power grid.

In this paper, we take a look at how dynamic voltage-drop analysis and optimization based on Sequence’s CoolTime sidesteps the inherent limitations of static voltage-drop analysis techniques.