Today’s System on Chip (SoC) development process demands increasingly sophisticated verification to handle the on-going growth in complexity. A complete solution of proven methodology and technology is required to provide effective block to system level verification. Cadence and ARM have collaborated to deliver a Functional Verification Kit that provides the methodology, technology, and IP to meet this goal. This solution gives the design teams the tools and techniques needed to predictably address the challenge of verifying ARM processor-based systems and get to verification closure.

Reprinted in its entirety from ARM IQ Vol. 5, No. 3, 2006