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Simplify Clock Tree Design in High Speed FPGA and Application Processor Designs

Original Air Date: May 6, 2020 Webinar
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Field Programmable Gate Array (FPGA) and application-specific processors/SoC usages are becoming increasingly common in numerous high performance applications such as networking, data centers, automotive, broadcast video, medical and print imaging and industrial controls. As performance of application increases, more reference clocks with high precision are needed for the end applications.

In this webinar we will discuss Silicon Labs' broad portfolio of flexible, any-frequency clock generators utilize the patented MultiSynthâ„¢ technology to provide the most integrated timing solutions without compromising performance. Designing a reference clock tree for a high performance FPGA or processor/SoC design is an exacting task and at Silicon Labs, we have a clock for that.

Attendees will learn:

  • Common timing requirements for FPGAs and application processors
  • Creating clock tree solutions to optimize performance, cost and board space
  • How Silicon Labs tools can simplify clock tree designs

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