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Demystifying IoT Security Design with Threat Modeling

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Oct 30, 2018

12:00 pm ET

9:00 am PT

5:00 pm CET

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Protecting assets associated with connected IoT devices is critical. Threat modeling and Security Analysis (TMSA) is a systematic approach to defining the security requirements for a system that protects assets to the right level. This presentation will show an example of TSMA for smart speakers and explain how the Arm Platform Security Architecture can facilitate a systematic and holistic approach to creating a secure-by-design product.

Attendees will learn:

  • Gain an understanding of the Arm Platform Security Architecture
  • Gain an understanding of how to define the right security requirements for their connected device
  • Learn how to define the right countermeasures to future proof the protection of their assets against attacks
  • Learn some of the practical ways that assets are protected by using a real use-case example
  • Learn how security requirements can be systematically derived and how implementation of requirements is clearly traced back to asset protection
  • Learn how to leverage from Arm hardware IP, firmware and software security primitives to realize a system solution that maps to above security requirements

Speakers

Brian Clinton, Senior Director, Engineering Services, ARM

Brian Clinton has worked for over 20 years in the semiconductor industry with a keen focus on SoC architecture and Security. He has authored numerous conference papers and has been granted US patents. Brian holds an MBA, and a MEng, BEng and BMath from Trinity College Dublin.

Suresh Marisetty, IoT Principal Security Solutions Architect, ARM

Suresh Marisetty is an IoT Principal Security Solutions Architect at Arm. Prior to joining Arm, Suresh delivered Si platform solutions at Intel, contributed to Server platform machine check architecture for RAS, enabling an industry standard through UEFI SIG. He holds 25 patents, several publications, co-author of the book "Beyond BIOS - Developing with UEFI" and vice-chair for TPS committee for global platform standards body. Suresh has a MSEE from Cal Poly, Pomona, CA.

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