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Eclypse Low Power Solution: Clock Tree Synthesis

Authored on: Jan 28, 2009 by David Hsu and Harvey Toyama

Technical Paper

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With the predominance of mobile devices, the rising cost of energy, and an increasing sensitivity to green practices, low power consumption has become a major concern for design engineers. This paper will outline some best practices for low power design and explain how IC Compiler, a key part of Synopsys' Eclypse Low Power Solution, delivers low power clock tree synthesis (CTS) that concurrently achieves the lowest design power and the best possible performance and area.

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