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Minimizing Dynamic Power in Embedded Designs

Authored on: Feb 11, 2005 by Geoff Harvey

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The majority of techniques currently aimed at reducing static power consumption in embedded designs focus on minimizing leakage, but this will not save enough power to meet the performance demands facing future product generations. Designers need to minimize dynamic power consumption to truly satisfy market demands.

This article examines technologies available to help embedded designers reduce dynamic power consumption, including adiabatic computing. Adiabatic I/O drivers can save 50-75% of the energy involved in driving an I/O pin, delivering significant savings in overall power. The technology is also evolving to save power at die interconnects in multi-chip modules and, ultimately, between peripherals in SoC designs.

Reprinted in its entirety from ARM IQ Vol. 3, No. 4

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