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Real Intent

Companies worldwide rely on Real Intent’s EDA software to accelerate
early functional verification and advanced sign-off of electronic designs. The
company provides comprehensive CDC verification, advanced RTL analysis and
sign-off solutions to eliminate complex failure modes of SoCs. Real Intent’s Meridian
and Ascent product families lead the market in performance, capacity, accuracy
and completeness. Please visit www.realintent.com for more information

 

Headquarters: Sunnyvale, California Other Locations
Phone: +1-408-830-0700
Our Website: http://www.realintent.com/

Industry Semiconductor Design & Manufacturing
Application & Technologies:
Design Tools (EDA)

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Our TechOnline Content

X-Propagation Woes: Masking Bugs at RTL and Unnecessary Debug at the Netlist

Debug / Development / EDA | IP / Tools | Development / Verification / Verification /

Tech Paper

Clock and Reset Ubiquity: A CDC Verification Perspective

EDA | IP / Verification / Verification /

Tech Paper

Clock Domain Crossing Demystified: The Second Generation Solution for CDC Verification

ASICs/SoCs / Power | Power Management / Regulation / Verification / Verification /

Tech Paper

See more from Real Intent

Featured Video

In this EDACafe.com video taken at DVCon 2012, Lisa Piper discusses the issue of what happens when unknown values (X’s) propagate through a design and X-optimism can hide bugs and X-pessimism causes unnecessary debug steps

Chris Morrison, Chief Architect at Real Intent discusses the differences that set the Implied Intent Verification (IIV) tool apart from lint and simulation. He highlights the positive impact on designs that have even 99% testbench coverage. This interview took play in July 2012. […]

X-Verification: What Happens When Unknown Values Propagate Through a Design

In this EDACafe.com video taken at DVCon 2012, Lisa Piper, Technical Marketing Manager, discusses the issue of what happens when unknown values (X’s) propagate through a design and X-optimism can hide bugs and X-pessimism causes unnecessary debug steps. […]

SDC Management and Verification: What’s Missing?

Sarath Kirihennedige, Sr. Manager Product Engineering at Real Intent, speaks with Graham Bell about how design constraints (SDC) are currently developed, what are the problems with the current approach and what a complete Constraints management and verification solutions looks like. Sarath was most recently at Cadence Design Systems in a senior product engineering role. He […] […]

New Ascent Lint 2.0 HDL Analyzer and Rule Checker

Shiva Borzin, Technical Marketing Manager talks with Graham Bell about the Ascent Lint product, its market-leading performance and capacity, and the new 2.0 version released in Oct. 2012. […]

How is Verification Complexity Changing and What is the Impact on Sign-off?

Pranav Ashar, CTO at Real Intent, speaks with Graham Bell on how verification complexity is changing beyond the simple growth in design complexity, and how that is impacting SOC sign-off. This interview took place in May 2012. […]

Real Intent Records Banner 2012: Doubles business, grows customer base by 60%

Prakash Narain, President and CEO of Real Intent, speaks with Graham Bell about the accomplishments in the fiscal year 2012 ending on Oct. 31. He points to the many referrals the company received from its customers to grow its base by 60%, and to the speed, capacity and low-noise reporting of its best-in-class solutions […]

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