This training describes the operation of the Programmable Real-Time Unit Subsystem (PRUSS). The PRUSS consists of dual 32-bit RISC cores (referred to as Programmable Real-Time Units, or PRUs), an interrupt controller, local data and instruction memories, and interfaces to capture and manipulate system-wide events and pins. The PRU instruction set is simple and execution times are deterministic. The programmable nature of the PRUs, along with their access to pins and events, provide flexibility in implementing custom peripheral interfaces, power saving techniques, specialized data handling and DMA operations, and in offloading tasks from the other processor cores of the system-on-chip (SoC).