ESC SV-432- Understanding Multi-Core Embedded O/S Issues
Multi-core CPUs are not just for “big iron” applications. Many traditional embedded CPU architectures are now supporting multiple CPU cores as well. This class outlines the issues with processor affinity, interrupt/process/thread scheduling, mutual exclusion, and cache coherency concerns when executing on a multi-core CPU. This class examines the low-level operating system features that support multi-core operation. In addition, this class helps set expectations for performance enhancements when running on these newer architectures.