ESC SV-141- A Low Power Design Methodology for Platform-Based SoCs
Low power has become a focal point for SoC designers. Advanced techniques such as multi-supply voltages, power gating, and dynamic voltage scaling are conceptually easy to understand, but are difficult to implement in practice. Learn from a top-tier ASIC service provider on how to increase the chance of success for your low power SoC using a proven low power methodology. From architecture and RTL design to synthesis tips and backend implementation, this class aims to educate and de-mistify low power design.