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    <title>TechOnline Forums: Message List - EDA Forum</title>
    <link>http://www.techonline.com/tigforums</link>
    <description>Most recent forum messages</description>
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    <pubDate>Wed, 10 Feb 2010 02:08:23 -0500</pubDate>


    <item>

        <title>Re: Comments for: &quot;EDA pundits confront market projections for 2010&quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21727&amp;tstart=0#21727</link>

        

        
            <description><![CDATA[P.S.: in addition to Wally's data on VC funding rounds for start-ups in 2008 and 2009, Magillem Design Services had an IPO at the end of 2009. I don't recall reading about any IPO in EDA in 2009 and only discovered Magillem's by accident last week.]]></description>
        

        <pubDate>Wed, 03 Feb 2010 12:39:13 -0500</pubDate>

        

        <jf:creationDate>Wed, 03 Feb 2010 12:39:13 -0500</jf:creationDate>
        <jf:modificationDate>Wed, 03 Feb 2010 12:39:13 -0500</jf:modificationDate>
        <jf:date>Feb 3, 2010</jf:date>
        <jf:author>garydpdx</jf:author>
        <jf:replyCount>0</jf:replyCount>
    </item>


    <item>

        <title>Re: Comments for: &quot;EDA pundits confront market projections for 2010&quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21726&amp;tstart=0#21726</link>

        

        
            <description><![CDATA[I love Gary Smith but I feel that his view on pent up demand will be offset by the need for electronics firms to a) stabilize on staffing and b) emerge smaller than they were before. Also factor in reorganizations, like ST-Ericsson which generates a new...]]></description>
        

        <pubDate>Wed, 03 Feb 2010 12:38:50 -0500</pubDate>

        

        <jf:creationDate>Wed, 03 Feb 2010 12:38:50 -0500</jf:creationDate>
        <jf:modificationDate>Wed, 03 Feb 2010 12:38:50 -0500</jf:modificationDate>
        <jf:date>Feb 3, 2010</jf:date>
        <jf:author>garydpdx</jf:author>
        <jf:replyCount>0</jf:replyCount>
    </item>


    <item>

        <title>Comments for: &quot;EDA pundits confront market projections for 2010&quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21725&amp;tstart=0#21725</link>

        

        
            <description><![CDATA[Read the article here: <a href="http://www.edadesignline.com/showArticle.jhtml?articleID=222600603">EDA pundits confront market projections for 2010</a>]]></description>
        

        <pubDate>Wed, 03 Feb 2010 12:38:49 -0500</pubDate>

        

        <jf:creationDate>Wed, 03 Feb 2010 12:38:49 -0500</jf:creationDate>
        <jf:modificationDate>Wed, 03 Feb 2010 12:38:49 -0500</jf:modificationDate>
        <jf:date>Feb 3, 2010</jf:date>
        <jf:author>garydpdx</jf:author>
        <jf:replyCount>2</jf:replyCount>
    </item>


    <item>

        <title>Re: Comments for: &quot;A real solution for mixed signal SoC verification&quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21396&amp;tstart=0#21396</link>

        

        
            <description><![CDATA[verif]]></description>
        

        <pubDate>Mon, 25 Jan 2010 16:25:45 -0500</pubDate>

        

        <jf:creationDate>Mon, 25 Jan 2010 16:25:45 -0500</jf:creationDate>
        <jf:modificationDate>Mon, 25 Jan 2010 16:25:45 -0500</jf:modificationDate>
        <jf:date>Jan 25, 2010</jf:date>
        <jf:author>Ron347</jf:author>
        <jf:replyCount>0</jf:replyCount>
    </item>


    <item>

        <title>Comments for: &quot;A real solution for mixed signal SoC verification&quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21395&amp;tstart=0#21395</link>

        

        
            <description><![CDATA[Read the article here: <a href="http://www.edadesignline.com/222200728?pgno=3#community">A real solution for mixed signal SoC verification</a>]]></description>
        

        <pubDate>Mon, 25 Jan 2010 16:25:45 -0500</pubDate>

        

        <jf:creationDate>Mon, 25 Jan 2010 16:25:45 -0500</jf:creationDate>
        <jf:modificationDate>Mon, 25 Jan 2010 16:25:45 -0500</jf:modificationDate>
        <jf:date>Jan 25, 2010</jf:date>
        <jf:author>Ron347</jf:author>
        <jf:replyCount>1</jf:replyCount>
    </item>


    <item>

        <title>(VHDL/Verilog/TCL) Stimulus Generators for AMBA2&amp;3</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21336&amp;tstart=0#21336</link>

        

        
            <description><![CDATA[Hi,<br />...]]></description>
        

        <pubDate>Sat, 23 Jan 2010 08:43:30 -0500</pubDate>

        

        <jf:creationDate>Sat, 23 Jan 2010 08:43:30 -0500</jf:creationDate>
        <jf:modificationDate>Sat, 23 Jan 2010 08:43:30 -0500</jf:modificationDate>
        <jf:date>Jan 23, 2010</jf:date>
        <jf:author>Alok123</jf:author>
        <jf:replyCount>0</jf:replyCount>
    </item>


    <item>

        <title>Re: Comments for: &quot;What next for microcontrollers?&quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21231&amp;tstart=0#21231</link>

        

        
            <description><![CDATA[Hello, probably a nice article, however using word ARM in every second sentence and <br />...]]></description>
        

        <pubDate>Wed, 20 Jan 2010 07:53:50 -0500</pubDate>

        

        <jf:creationDate>Wed, 20 Jan 2010 07:53:50 -0500</jf:creationDate>
        <jf:modificationDate>Wed, 20 Jan 2010 07:53:50 -0500</jf:modificationDate>
        <jf:date>Jan 20, 2010</jf:date>
        <jf:author>adamhusar</jf:author>
        <jf:replyCount>0</jf:replyCount>
    </item>


    <item>

        <title>Comments for: &quot;What next for microcontrollers?&quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=21230&amp;tstart=0#21230</link>

        

        
            <description><![CDATA[Read the article here: <a href="http://www.edadesignline.com/222200358?pgno=8#community">What next for microcontrollers?</a>]]></description>
        

        <pubDate>Wed, 20 Jan 2010 07:53:50 -0500</pubDate>

        

        <jf:creationDate>Wed, 20 Jan 2010 07:53:50 -0500</jf:creationDate>
        <jf:modificationDate>Wed, 20 Jan 2010 07:53:50 -0500</jf:modificationDate>
        <jf:date>Jan 20, 2010</jf:date>
        <jf:author>adamhusar</jf:author>
        <jf:replyCount>1</jf:replyCount>
    </item>


    <item>

        <title>Re: Comments for: &quot;SystemC synthesis subset draft standard released &quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=19441&amp;tstart=0#19441</link>

        

        
            <description><![CDATA[let me learn here whic can i get.]]></description>
        

        <pubDate>Tue, 15 Dec 2009 12:17:22 -0500</pubDate>

        

        <jf:creationDate>Tue, 15 Dec 2009 12:17:22 -0500</jf:creationDate>
        <jf:modificationDate>Tue, 15 Dec 2009 12:17:22 -0500</jf:modificationDate>
        <jf:date>Dec 15, 2009</jf:date>
        <jf:author>Leo8</jf:author>
        <jf:replyCount>0</jf:replyCount>
    </item>


    <item>

        <title>Comments for: &quot;SystemC synthesis subset draft standard released &quot;</title>
        <link>http://www.techonline.com/tigforums/thread.jspa?messageID=19440&amp;tstart=0#19440</link>

        

        
            <description><![CDATA[Read the article here: <a href="http://www.edadesignline.com/news/221600752">SystemC synthesis subset draft standard released </a>]]></description>
        

        <pubDate>Tue, 15 Dec 2009 12:17:14 -0500</pubDate>

        

        <jf:creationDate>Tue, 15 Dec 2009 12:17:14 -0500</jf:creationDate>
        <jf:modificationDate>Tue, 15 Dec 2009 12:17:14 -0500</jf:modificationDate>
        <jf:date>Dec 15, 2009</jf:date>
        <jf:author>Leo8</jf:author>
        <jf:replyCount>1</jf:replyCount>
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