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On-Demand Webinar |
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| Accelerate IPTV Headend Design Using Available IP and Reference Designs Net Seminar |
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Overview:
There's no need to reinvent the wheel to design an IPTV headend. Many key building blocks from video encoders and data communication applications are available and can be reused. They can easily be implemented into FPGAs that are packed with powerful logic, DSP blocks, and memory.
This net seminar describes how using FPGAs with IP and reference designs can accelerate your designs and shorten time to market.
At the net seminar, you'll learn how to:
- Design an IPTV headend system
- Integrate the building blocks in your existing systems
- Speed your system design and time-to-market with FPGAs and megafunctions
- Accelerate system performance with optimized IP and reference designs
Who Should View
- System architects
- Embedded system design engineers
- FPGA developers
- Engineering & technical managers
Drawing
All participants who attend the net seminar between October 5th and October 16th and complete the post-presentation survey will be entered into the drawing for a chance to win an Epson P-2000 (US$500 value).
Official Rules
Presenter
Tam Do
Senior Technical Marketing Manager,
Broadcast/Automotive/Consumer Business Unit
As senior technical marketing manager of the Broadcast/Consumer Applications Business Unit, Tam Do is responsible for all technical and marketing issues related to the digital broadcast, automotive, and consumer electronics industries. Mr. Do joined Altera in June 2003. Before that time, he was most recently the application design manager of LSI Logic's Consumer Product Group, where he was focused on the development design of application-specific standard products (ASSPs) evaluation system and software for the set-top box industry. Mr. Do holds a BSEE from the University of Nevada Reno, and has close to 20 years of electronics system experience with LSI Logic, Stratex Network, and Verizon Corporation.
Related links
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Altera Corporation
Altera Corporation (www.altera.com) is the world's pioneer of system-on-a-programmable-chip (SOPC) solutions. With annual revenues in CY 2005 of $1.12 billion, Altera combines the reprogrammable logic technology originally invented in 1983 with software tools, intellectual property (IP), and design services to provide high-value programmable solutions to approximately 14,000 customers worldwide. Altera is headquartered in San Jose, California, and employs approximately 2,300 people in 14 countries. |
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