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Eliminating Functional Problems Due to Clock-Domain Crossing (CDC)
Overview:

Clocking issues are the second leading cause of silicon respins. In today's multi-clock designs, errors relating to the management of clock-domain crossing (CDC) signals are difficult to find with traditional verification -- resulting in functional errors in silicon. This seminar will examine why CDC signals cause problems for verification, and how they can be identified, managed and verified using automated RTL analysis combining formal and simulation techniques.



Presenter: Neil Hand

Mr. Hand has over 15 years of experience in engineering design, customer support, sales and marketing. Prior to Mentor/0-In, Mr. Hand worked for a number of EDA companies in the design and verification space, including Averant, Get2Chip and Synopsys. As a telecommincations expert at Ericsson he gained extensive design experiance. Mr Hand holds a B.Eng in Electrical Engineering and B.Sc Computing degree from the Queensland University of Technology, Australia.


For questions regarding this presentation, contact: Michelle Lange michelle_lange@mentor.com


Additional Information:

Whitepaper: The Need for an Automated Clock Domain Crossing Verification Solution

Clock domain crossings (CDC) continue to be a trouble spot for functional verification. With the number of clock domains increasing in today's complex system designs, the ability to thoroughly verify CDC has become even more important. Traditional methods have come up short in fully verifying and controlling metastability, the primary manifestation of CDC errors. This paper discusses new tools and methodologies are available to address these shortcomings.

Request this paper – link to: http://www.mentor.com/products/fv/techpubs/mentorpaper_28966.cfm


On-Demand Webcast: Integrating Functional Formal Verification into a Traditional Flow

For more information and to view the webcast: http://seminar2.techonline.com/s/mentor_may1006


The Hitchhikers Guide to Verification Seminar with Mentor Graphics

For more information and registration: http://www.mentor.com/products/fv/events/hitchhikers_guide.cfm


Verification Horizons

Provides concepts, methodologies and examples to assist with constrained-random generation, ABV, coverage-driven verification, formal verification and more. Articles focus on these technologies and how to effectively apply them.

For more information and registration: http://www.mentor.com/products/fv/verification_news.cfm
Please contact TechOnline's Webinar Support with any questions.
Email: webinar@techonline.com
Mentor Graphics
Mentor Graphics® is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Mentor Graphics has the broadest industry portfolio of best-in-class products, and is the only EDA company with an embedded software solution.

 
Original Broadcast Date
May 23, 2006
Status
Available On-Demand
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