Only Xilinx Virtex-4 FPGAs help you achieve your performance targets in the shortest possible time. Extracting maximum performance from Virtex-4 FPGAs requires the right set of software tools and methodologies. Whether you're just looking for optimal out-of-the-box, push-button performance or you're an advanced power-user trying to complete a complex, multi-clock design; Xilinx provides the tools and technologies to achieve the best possible performance

Meeting timing budgets is the #1 critical issue facing FPGA designers. Inferior design tools can hit a performance barrier, preventing you from meeting your timing goals. (and costing you precious time, higher speed-grades and resources). ISE software from Xilinx helps meet design performance in the shortest possible time. And to make the most of the Virtex-4 performance advantage, Xilinx offers PlanAhead software, which allows designers to analyze floorplan and improve placement and timing of even their most complex designs. Now you can meet your timing budgets and reduce design iterations in an easy-to-use design environment. With additional tools, such as the new Xplorer, designers can discover the ideal design results through multiple implementation runs using different place and route settings and switches.

This presentation will also discuss a recent series of benchmark tests involving the Virtex series of FPGAs versus competing FPGA solutions. Only Xilinx through its Virtex-4 FPGAs and PlanAhead design and analysis software helps designers achieve maximum performance for their complex high utilization, multi-clock designs. PlanAhead Design Analysis Tool, combined with the ISE Design Tools, achieved an average of 30% better performance than the nearest competing solution. This suite of benchmark designs was comprised of real-world customer designs, most with device utilization greater than 85%. What was significant was the fact that the most complex, multi-clock designs averaged greater than 51% faster performance.

• An overview of the latest software technologies for achieving maximum performance with Virtex-4 FPGAs
• Details on the tools and technologies to help designers achieve unmatched performance
• Simple steps to explore to achieve performance goals
• Advanced design techniques to meet aggressive performance goals
• How to improve performance even more through PlanAhead

• High-density FPGA engineers
• Designers of complex, high-performance systems
• System Architects
• Engineering or technical managers

Steve Sharp has been at Xilinx since 1993 and has worked in design tool product marketing, silicon device product marketing, product solutions marketing, and currently works on corporate solutions marketing working across all Xilinx product areas. He has worked on all aspects of FPGA solutions from synthesis and design implementation tools to silicon devices, packaging, and verification.