The newest version of Virtex FPGAs from Xilinx provide a boost in speed, reduction in power, and significant reduction in cost that promises to propel many new designs.
Jim Harrison
West Coast editor for Electronic Products Magazine

Presenters:
Adrian Cosoroaba
Marketing Manager - Xilinx

Adrian Cosoroaba joined Xilinx in 2004 as Marketing Manager for Virtex Solutions and he is responsible for worldwide marketing activities related to Memory Solutions. He brings to Xilinx over 18 years of semiconductor experience in memory applications and marketing. Prior to joining Xilinx, he held a range of applications engineering and strategic marketing positions at Fujitsu and helped define through JEDEC the DDR SDRAM and SSTL I/O standards. He holds an M.S. in Electrical Engineering from Ohio State University and a B.S. in Engineering Physics from University of California at Berkeley.

Maria George
Senior Applications Engineer - Xilinx

Maria holds a Master of Science degree in Electrical Engineering from Santa Clara University with an emphasis in hardware design. With Xilinx since 1999, Maria develops HDL reference designs and application notes for memory interfaces in her capacity as a Senior Applications Engineer in the Advanced Product Division.

On-Demand Webinar

High-Performance Memory Interfaces Made Easy

Overview: Reliable source-synchronous data capture is the most critical, and most difficult, challenge for building high-performance memory interfaces. Virtex-4 FPGAs include ChipSync™ technology built into every I/O. This unique feature ensures reliable data capture under changing system conditions. Complete memory interface solutions from Xilinx enable designers to implement complex memory systems quickly and easily. View all Xilinx TechOnline events Webcast attendees will learn how to: Build highest bandwidth memory interfaces: DDR2 SDRAM, DDR SDRAM, QDR II SRAM, RLDRAM II Achieve highest design margins with "run time" clock-to-data centering Accelerate design cycles with complete memory interface solutions