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On-Demand Webinar |
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| Connecting to DDR2: Mitigating High-Speed Challenges in SoC Designs |
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| Select 'Register' to attend this event or 'View Series' for more information on Synopsys DesignWare IP Webinar Series 2007 |
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 Live attendees who also submit the feedback form will be eligible to win a FREE 2GB iPod Nano (value approx. $150). Official Rules
Overview:
DDR2 SDRAM is an increasingly common memory solution for designs because of its price, availability, bandwidth capability, and wide range of configurations. However, the benefits of DDR2 SDRAM are coupled with significant implementation challenges at higher speed as the bit period shrinks and physical signaling issues become prominent. To further compound the problem, designers who use third-party IP as building blocks cannot assume interoperability among individual subsystem components. This session provides an overview to the memory interface subsystem design approach Synopsys proposes and how a complete integrated solution can reduce risk and increase design quality.
Products Featured:
- DesignWare DDR2 Memory Interface Solution
Who Should Attend:
- Designers creating devices that connect to DDR2 memory
- Engineering managers
- System architects
- Logic designers
- PHY designers
Moderator:
 Clive "Max" Maxfield has now spent over a quarter of a century in the electronic, computing, and EDA arenas. In 1980, after obtaining his BSc in Control Engineering (an interesting mixture of math, electronics, mechanics, and hydraulics and fluids), Max joined a design team at International Computers Limited (ICL) creating CPUs for mainframe computers. In addition to designing ASICs and circuit boards, Max has written numerous test programs for functional and in-circuit testers. In the area of digital logic simulation, Max has created models of everything from ASIC cell libraries to microprocessors. Due to his digital expertise, Max was once appointed analog marketing manager at a large EDA company (the world is a funny old place sometimes).
In the early 1990s, Max thought it would be fun to see a book he'd written on the shelves in his local book store, so he penned his first tome Bebop to the Boolean Boogie (An Unconventional Guide to Electronics). Since that time, Max has authored and co-authored a number of books, including EDA: Where Electronics Begins, The Design Warrior's Guide to FPGAs, and How Computers Do Math (Featuring the Virtual DIY Calculator).
Presenters:
 David Ptak is staff corporate applications engineer supporting DesignWare Memory Interface IP. David has been helping Synopsys' tool and IP users reach their design goals since 1998. He has extensive experience with memory interfaces, AMBA on-chip busses and IP assembly automation. Prior to Synopsys, David was an ASIC Design Engineer at Motorola and Amdahl, designing processor chip sets.
 Graham Allan is a Senior Product Marketing Manager for Memory IP at Synopsys. Graham has over 22 years of experience in memory design, engineering management and marketing positions covering DRAM, SDRAM, DDRn SDRAM, TCAM, SRAM, embedded SRAM, memory controllers and related IP products. Graham holds a Bachelor of Engineering degree in Electrical Engineering from Carleton University in Ottawa, Ontario, Canada.
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| Synopsys, Inc. (Nasdaq:SNPS) is a world leader in electronic design automation (EDA) software for semiconductor design. The company delivers technology-leading system and semiconductor design and verification platforms, IC manufacturing and yield optimization solutions, semiconductor intellectual property and design services to the global electronics market. These solutions enable the development and production of complex integrated circuits and electronic systems. Through its comprehensive solutions, Synopsys addresses the key challenges designers and manufacturers face today, including power management, accelerated time to yield and system-to-silicon verification. Synopsys is headquartered in Mountain View, California, and has more than 60 offices located throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com |
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Original Broadcast Date |
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Jul 25, 2007
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| Synopsys DesignWare IP Webinar Series 2007 |
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