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Overview:
MathStar's new Field Programmable Object Array (FPOA™) is a 1 GHz, reprogrammable device offering up to four times the performance of FPGAs. This presentation will show the advantages of FPOAs in image processing applications such as flat field error correction, edge detection, two dimensional filters and two dimensional transforms. Examples of each will be discussed including performance benchmarks and resource requirements.
Attend and find out how MathStar's 1 GHz Field Programmable Object Array (FPOA) can be used to implement a variety of high performance image processing algorithms at up to four times the performance of FPGAs at a much lower cost.
What you should learn:
- The basics of the FPOA architecture
- The performance benefits of an FPOA in image processing
- How to implement basic image processing blocks in the FPOA
Who should attend:
- Anyone seeking performance beyond current FPGAs
- Designers who need to accelerate certain functions of their system
- ASIC designers and designers using high-performance FPGAs
- Designers of complex, high-performance systems
- System architects
- Engineering or technical managers
- Anyone with an interest in programmable logic design
Presenters:
Sean Riley, VP of Marketing
Mr. Riley joined MathStar as Vice President of Marketing in April 2005. Mr. Riley is responsible for the planning, definition, positioning and marketing of MathStar's Field Programmable Object Array (FPOA) product line. Prior to joining MathStar, Mr. Riley spent 13 years at Intel Corporation in various marketing, engineering and general management roles.
Jeffery L. Moll, Senior Technical Marketing Engineer
Mr. Moll recently joined MathStar, Inc. and is primarily responsible for working with Marketing, Engineering and Field Applications to better leverage our technical capabilities into a given vertical market and applications. Mr. Moll has over 18 years experience working in the semiconductor and system industries. Most recently his primary focus was in the telecom industry managing and developing large ASSP / CSSP SoC devices that embed standard and custom IP for networking and printer applications.
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