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Xcell Journal Article
638 KB (5 pages)
February 2009
 

Barrie Timpe
Xilinx

Designers are under the gun, pressured to do more in less time. All too often, customers and design management want it all, and they want it now. At the same time, silicon is growing more complex as each new device family piles on features. The FPGA is no longer a relatively simple array of logic blocks, a peripheral I/O ring and a centralized clock tree. As densities have grown, hardened silicon resources (block memories, DSP slices, advanced I/O blocks, multigigabit transceivers, PPC405/440 and the like) have added powerful features and performance capabilities to programmable logic devices.

Reprinted with permission from Xcell Journal / First Quarter 2009. Article © Xcell Journal.

 
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