Lattice Semiconductor
Next-generation interconnects continue to press the limits of both hardware and software technologies. The need for increased quality of service (QoS), channel separation, fairness, and data integrity are just a few of the requirements that deserve serious consideration. PCI Express is one such interconnect that is finding its way into a growing variety of application spaces. When implementing a PCI Express interface in a field programmable gate array (FPGA), designers must consider how data will be transferred in order to ensure that system efficiency, system jitter, data timing budgets, and overall bandwidth requirements are met from an end-to-end perspective. Combining a Scatter/Gather Direct Memory Access (SGDMA) controller and a PCI Express interface can greatly help designers meet these requirements. This paper examines some of the advantages of using an FPGA-based SGDMA controller in conjunction with a PCI Express core.
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