Brandon Waldo et al.
Synopsys

Rapid changes in system-on-chip (SoC) power consumption have forced designers to rethink the methodologies they employ throughout the design flow to account for power-related effects. In addition to leakage power impacting battery life in mobile applications, increases in SoC size and speed have brought about heat dissipation and reliability issues.

This white paper represents Part One of a three-part series that provides an overview of SoC power management and describes methods for estimating and analyzing power consumption. Drawing on insights from a pool of industry talent, including Synopsys R&D engineers, consultants, and customers with design experience at 90nm, 65nm, and 45nm, Part One provides a full description of power-related issues and requirements for early power planning, beginning at the architectural level.