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Applying Assertion-Based Formal Verification to Verification Hot Spots

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Mentor Graphics Technical Library
October 25, 2007
 

Ping Yeung and Sundaram Subramanian
Mentor Grapics

This paper discusses assertion-based verification (ABV) for complex system-on-a-chip (SoC) designs. Based on Mentor Graphics' experience helping design teams deploy assertions and formal verification, the company recommends deploying ABV (including formal model checking) on the most salient verification hot spots in a design, following a seven-step, formal verification planning process. By focusing ABV on verification hot spots, a design team can adopt ABV incrementally as they continue to use their simulation-based methodology. This has the added benefit of minimizing the risks involved with adopting a new methodology, while maximizing return-on-investment.

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