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RISC-DSP: An Exploration into the How's and Why's

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2000 Online Symposium for Electronics Engineers (OSEE)
87 KB (16 pages)
September 2000
 

George Wall and Sam Rosen
Lexra

Today's high-end digital signal processing (DSP) products demand both efficient execution of control code and high-performance execution of DSP algorithms. For example, Voice over Internet Protocol (VoIP) applications require IP stack management, a classic reduced instruction set computer (RISC) function, in addition to speech coding and echo cancellation. RISC-DSPs—new architectures that add DSP capabilities to conventional RISC processors—have emerged as a solution for such applications.

This paper describes how powerful DSP features can be integrated into a RISC architecture to meet application requirements. The power of the RISC-DSP architecture is illustrated through the use of an FIR programming example, which will show how the FIR's performance is improved by the introduction of DSP extensions to the RISC ISA.

 
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Lexra
Online Symposium for Electronics Engineers (OSEE)
   

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